compute_dag.h

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#ifndef TVM_AUTO_SCHEDULER_COMPUTE_DAG_H_
#define TVM_AUTO_SCHEDULER_COMPUTE_DAG_H_
 
#include <tvm/auto_scheduler/loop_state.h>
#include <tvm/runtime/c_runtime_api.h>
#include <tvm/te/schedule.h>
 
#include <unordered_map>
#include <unordered_set>
#include <utility>
#include <vector>
 
namespace tvm {
namespace auto_scheduler {
 
class AccessAnalyzerNode : public Object {
 public:
  template <class T>
  using OperationMap = std::unordered_map<te::Operation, T, ObjectPtrHash, ObjectPtrEqual>;
 
  OperationMap<OperationMap<std::vector<std::vector<PrimExpr>>>> read_from;
  OperationMap<OperationMap<std::vector<std::vector<PrimExpr>>>> read_by;
  OperationMap<OperationMap<int>> num_common_outer_iterators;
  OperationMap<bool> is_simple_access;
  OperationMap<bool> is_strictly_inlineable;
  OperationMap<bool> needs_multi_level_tiling;
  OperationMap<bool> is_output;
  Array<te::Operation> ops_topo_order;
 
  static constexpr const char* _type_key = "auto_scheduler.AccessAnalyzer";
  TVM_DECLARE_FINAL_OBJECT_INFO(AccessAnalyzerNode, Object);
};
 
class AccessAnalyzer : public ObjectRef {
 public:
  explicit AccessAnalyzer(const Array<te::Tensor>& tensors);
 
  TVM_DLL bool IsSimpleAccess(const te::Operation& op) const;
 
  TVM_DLL bool IsStrictlyInlineable(const te::Operation& op) const;
 
  TVM_DLL bool NeedsMultiLevelTiling(const te::Operation& op) const;
 
  TVM_DLL bool IsOutput(const te::Operation& op) const;
 
  TVM_DLL std::unordered_set<te::Operation, ObjectHash, ObjectEqual> GetConsumers(
      const State& state, const te::Operation& op) const;
 
  TVM_DLL std::unordered_set<te::Operation, ObjectHash, ObjectEqual> GetProducers(
      const State& state, const te::Operation& op) const;
 
  TVM_DLL std::unordered_set<te::Operation, ObjectHash, ObjectEqual> GetDirectProducers(
      const te::Operation& op) const;
 
  TVM_DLL int GetNumCommonOuterIterator(const te::Operation& op,
                                        const te::Operation& target_op) const;
 
  TVM_DLL bool ElementWiseMatch(const te::Operation& op, const te::Operation& target_op) const;
 
  TVM_DEFINE_OBJECT_REF_METHODS(AccessAnalyzer, ObjectRef, AccessAnalyzerNode);
};
 
class ComputeDAGNode : public Object {
 public:
  Array<te::Tensor> tensors;
  Array<te::Operation> ops;
  double flop_ct;
  State init_state;
  AccessAnalyzer access_analyzer;
 
  void VisitAttrs(tvm::AttrVisitor* v) {
    v->Visit("tensors", &tensors);
    v->Visit("ops", &ops);
    v->Visit("flop_ct", &flop_ct);
    v->Visit("init_state", &init_state);
    v->Visit("access_analyzer", &access_analyzer);
  }
 
  static constexpr const char* _type_key = "auto_scheduler.ComputeDAG";
  TVM_DECLARE_FINAL_OBJECT_INFO(ComputeDAGNode, Object);
};
 
enum class LayoutRewriteOption : int {
  NoRewrite = 0,
  InsertTransformStage = 1,
  RewriteForPreTransformed = 2,
};
 
class ComputeDAG : public ObjectRef {
 public:
  TVM_DLL explicit ComputeDAG(Array<te::Tensor> tensors);
 
  TVM_DLL explicit ComputeDAG(const te::Schedule& sch);
 
  ComputeDAG RewriteLayout(Array<Step>* transform_steps, LayoutRewriteOption layout_rewrite) const;
 
  std::pair<te::Schedule, Array<te::Tensor>> ApplySteps(
      const Array<Step>& transform_steps, Array<te::Stage>* stages = nullptr,
      StageToAxesMap* stage_to_axes = nullptr,
      LayoutRewriteOption layout_rewrite = LayoutRewriteOption::NoRewrite) const;
 
  String PrintStepsAsPython(const Array<Step>& transform_steps) const;
 
  String PrintDAG(bool simple_mode = false) const;
 
  State InferBound(const State& state) const;
 
  Array<State> InferBound(const Array<State>& states) const;
 
  ComputeDAG ReplayAndGetDAG(const Array<Step>& steps) const;
 
  static constexpr const char* layout_free_placeholders_key = "layout_free_placeholders";
 
  TVM_DEFINE_OBJECT_REF_METHODS(ComputeDAG, ObjectRef, ComputeDAGNode);
  TVM_DEFINE_OBJECT_REF_COW_METHOD(ComputeDAGNode);
};
 
Array<PrimExpr> GetShapeFromRewrittenLayout(String rewritten_layout, Array<String> axis_names);
 
}  // namespace auto_scheduler
}  // namespace tvm
 
#endif  // TVM_AUTO_SCHEDULER_COMPUTE_DAG_H_