analysis.h File Reference

Analysis utilities for Schedulable TensorIR (S-TIR). More...

#include <tvm/ir/module.h>
#include <tvm/ir/prim/expr.h>
#include <tvm/ir/transform.h>
#include <tvm/s_tir/stmt.h>
#include <tvm/target/target.h>
#include <tvm/tirx/function.h>
#include <tvm/tirx/stmt.h>
#include <optional>

Include dependency graph for analysis.h:

Go to the source code of this file.

Classes
struct	tvm::s_tir::MemCpyDetails
	Helper struct for return value of IdentifyMemCpy. More...

Namespaces
namespace	tvm
	An object that builds and maintains block scope and StmtSref mapping for Dependence analysis.
namespace	tvm::tirx
	Backend-defined execution hierarchy nodes shared by layouts and tile calls.
namespace	tvm::sym
	namespace of symbolic analysis.
namespace	tvm::s_tir
namespace	tvm::s_tir::transform

Functions
ffi::Array< ffi::Array< TensorRegion > >	tvm::tirx::GetSBlockAccessRegion (const s_tir::SBlock &block, const ffi::Map< Var, TensorVar > &tensor_var_map)
	Auto detect the block access region according to its body stmt It will detect the access region as an array in order of appearance in AST.
ffi::Array< ffi::Array< TensorRegion > >	tvm::tirx::GetSBlockReadWriteRegion (const s_tir::SBlock &block, const ffi::Map< Var, TensorVar > &tensor_var_map)
	Auto detect the block read/write region according to its body stmt. An opaque access will be counted as both a read and a write access.
ffi::Map< TensorVar, ffi::Optional< Stmt > >	tvm::tirx::DetectTensorAccessLCA (const Function &func)
	Detect the lowest common ancestor(LCA) of tensor access, including both high-level access(TensorLoad, TensorStore) and low-level access(Load, Store and opaque access). The LCA may be a For loop or a Block.
const s_tir::SBlockNode *	tvm::tirx::FindAnchorBlock (const IRModule &mod)
	Find the "anchor block" of the given module. We define the anchor block to be the block with (1) an init statement and (2) having the biggest flops count. The latter condition is only used when there are multiple blocks with an init statement. For example, if the input module is conv2d + fused spatial blocks, conv2d is the anchor block. The input module may not contain more than one such block. For example, a module having two conv2d is not allowed as an input. However, a module created from winograd convolution has multiple blocks with an init statement (input transform, batched GEMM, and output transform). We use the second condition, the flops count, to determine that the batched GEMM block is the anchor block.
bool	tvm::s_tir::VerifyWellFormed (const tirx::Function &func, bool assert_mode=true)
	Verify variable/tensor definitions, load types and schedulable block boundaries.
bool	tvm::s_tir::VerifyWellFormed (const IRModule &mod, bool assert_mode=true)
	Verify S-TIR or mixed modules, including definitions shared across functions.
double	tvm::s_tir::EstimateTIRFlops (const Stmt &stmt)
	Estimate the FLOPs of a TIR fragment.
double	tvm::s_tir::EstimateTIRFlops (const IRModule &mod)
	Estimate the FLOPs of TIRs in an IRModule.
bool	tvm::s_tir::IsPureFunction (const Function &func, bool assert_on_error=false)
	Analyze the side effect of a function.
bool	tvm::s_tir::VerifyGPUCode (const Function &func, ffi::Map< ffi::String, PrimExpr > constraints)
	Verify the correctness of a GPU code.
std::optional< MemCpyDetails >	tvm::s_tir::IdentifyMemCpy (const For &loop, const sym::Analyzer &analyzer)
	Identify whether a For loop is semantically equivalent to MemCpy.
ffi::Array< ffi::Optional< Range > >	tvm::s_tir::DomainTouched (const Stmt &body, const TensorVar &tensor, bool consider_loads, bool consider_stores)
	Infer the domain touched by tensor accesses within a statement.
ffi::Map< ffi::String, ffi::Map< ffi::String, int64_t > >	tvm::s_tir::CalculateAllocatedBytes (const Function &func)
	Calculate the allocated memory per scope in bytes needed inside the TIR Function.
ffi::Map< ffi::String, ffi::Map< ffi::String, int64_t > >	tvm::s_tir::CalculateAllocatedBytes (const IRModule &mod)
	Calculate the allocated memory per scope in bytes for each function inside the module.
ffi::Array< tvm::transform::Pass >	tvm::s_tir::GetVTCMCompactionPasses ()
	Get the list of lowering passes to calculate the compacted VTCM allocation size.
bool	tvm::s_tir::VerifyVTCMLimit (const IRModule &mod, int64_t limit)
	Verifies that the VTCM usage for all functions in the given IRModule.
bool	tvm::s_tir::VerifyVTCMLimit (const Function &func, int64_t limit)
	Verifies that the VTCM usage of the given function is within the provided limit.
Pass	tvm::s_tir::transform::VerifyGPUCode (ffi::Map< ffi::String, PrimExpr > constraints)
	Pass to verify GPU code constraints.
Pass	tvm::s_tir::transform::VerifyVTCMLimit (ffi::Optional< Target > default_target=std::nullopt)
	Pass to check if VTCM usage is within limit.
Pass	tvm::s_tir::transform::OOBChecker ()
	Statically check TIR code for out of bounds array access.

Detailed Description

Analysis utilities for Schedulable TensorIR (S-TIR).