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tvm
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Analysis utilities and passes for TIR. More...
#include <tvm/ir/module.h>#include <tvm/ir/transform.h>#include <tvm/target/target.h>#include <tvm/tir/expr.h>#include <tvm/tir/function.h>#include <tvm/tir/op_attr_types.h>#include <tvm/tir/stmt.h>#include <optional>#include <string>Go to the source code of this file.
Classes | |
| struct | tvm::tir::ExprDeepEqual |
| Compare two expressions recursively and check if they are equal to each other without var remapping. More... | |
| struct | tvm::tir::MemCpyDetails |
| Helper struct for return value of IdentifyMemCpy. More... | |
Namespaces | |
| tvm | |
| runtime implementation for LibTorch/TorchScript. | |
| tvm::arith | |
| namespace of arithmetic analysis. | |
| tvm::tir | |
| tvm::tir::transform | |
Functions | |
| template<class FLambda > | |
| void | tvm::tir::VisitPrimFuncs (const IRModule &mod, FLambda fvisit) |
| Visit the PrimFuncs in the IRModule. More... | |
| double | tvm::tir::EstimateTIRFlops (const Stmt &stmt) |
| Estimate the FLOPs of a TIR fragment. More... | |
| double | tvm::tir::EstimateTIRFlops (const IRModule &mod) |
| Estimate the FLOPs of TIRs in an IRModule. More... | |
| Array< Var > | tvm::tir::UndefinedVars (const Stmt &stmt, const Array< Var > &defs) |
| Find undefined vars in the statement. More... | |
| Array< Var > | tvm::tir::UndefinedVars (const PrimExpr &expr) |
| Find undefined vars in the expression. More... | |
| Array< Var > | tvm::tir::UndefinedVars (const PrimExpr &expr, const Array< Var > &defs) |
| Find undefined vars in the expression. More... | |
| CallEffectKind | tvm::tir::SideEffect (const PrimExpr &expr) |
| Analyze the side effect of an expression. More... | |
| bool | tvm::tir::IsPureFunction (const PrimFunc &func, bool assert_on_error=false) |
| Analyze the side effect of a function. More... | |
| bool | tvm::tir::UsesVar (const Stmt &stmt, std::function< bool(const VarNode *)> vset_contains) |
| Whether the given Stmt uses any var in the given variable set. More... | |
| bool | tvm::tir::UsesVar (const PrimExpr &expr, std::function< bool(const VarNode *)> vset_contains) |
| Whether the given PrimExpr uses any var in the given variable set. More... | |
| bool | tvm::tir::VerifySSA (const PrimFunc &func) |
| Verifies whether the IR stmt or Expr is in SSA form. That is: each Var is defined and assigned once(in Let/For) More... | |
| bool | tvm::tir::VerifyMemory (const PrimFunc &func) |
| Verify if memory accesses are legal for a specific target device type. More... | |
| bool | tvm::tir::VerifyGPUCode (const PrimFunc &func, Map< String, PrimExpr > constraints) |
| Verify the correctness of a GPU code It will check the whether the amount of memory usage or the number of threads in a block exceeds the limit. More... | |
| Array< tvm::transform::Pass > | tvm::tir::GetVTCMCompactionPasses () |
| Utility function to get the list of lowering passes to be applied to calculate the compacted VTCM allocation size. More... | |
| bool | tvm::tir::VerifyVTCMLimit (const IRModule &mod, Integer limit) |
| Verifies that the VTCM usage for all prim_funcs in the given IRModule. More... | |
| bool | tvm::tir::VerifyVTCMLimit (const PrimFunc &func, Integer limit) |
| Verifies that the VTCM usage of the given prim_func is within the provided limit. More... | |
| Array< Array< BufferRegion > > | tvm::tir::GetBlockAccessRegion (const Block &block, const Map< Var, Buffer > &buffer_var_map) |
| Auto detect the block access region according to its body stmt It will detect the access region as an array in order of appearance in AST. More... | |
| Array< Array< BufferRegion > > | tvm::tir::GetBlockReadWriteRegion (const Block &block, const Map< Var, Buffer > &buffer_var_map) |
| Auto detect the block read/write region according to its body stmt. An opaque access will be counted as both a read and a write access. More... | |
| std::optional< MemCpyDetails > | tvm::tir::IdentifyMemCpy (const For &loop, arith::Analyzer *analyzer) |
| Identify whether a For loop is semantically equivalent to MemCpy. More... | |
| size_t | tvm::tir::CalculateExprComplexity (const PrimExpr &expr) |
| Calculate the expresion complexity based on number of symbols it contains. More... | |
| size_t | tvm::tir::CalculateConstantBytes (const PrimFunc &func, const Integer &constant_byte_alignment) |
| Calculate the constants size in bytes needed by the TIR allocates inside the TIR PrimFunc. More... | |
| size_t | tvm::tir::CalculateWorkspaceBytes (const PrimFunc &func, const Integer &workspace_byte_alignment) |
| Calculate the workspace size in bytes needed by the TIR allocates inside the TIR PrimFunc. More... | |
| tvm::Map< String, tvm::Map< String, Integer > > | tvm::tir::CalculateAllocatedBytes (const PrimFunc &func) |
| Calculate the allocated memory per scope in bytes needed inside the TIR PrimFunc. More... | |
| tvm::Map< String, tvm::Map< String, Integer > > | tvm::tir::CalculateAllocatedBytes (const IRModule &mod) |
| Calculate the allocated memory per scope in bytes for each function inside the module. More... | |
| Map< Buffer, Optional< Stmt > > | tvm::tir::DetectBufferAccessLCA (const PrimFunc &func) |
| Detect the lowest common ancestor(LCA) of buffer access, including both high-level access(BufferLoad, BufferStore) and low-level access(Load, Store and opaque access). The LCA may be a For loop or a Block. More... | |
| bool | tvm::tir::VerifyWellFormed (const PrimFunc &func, bool assert_mode=true) |
| Verify if the given TIR is well-formed. The verification includes: More... | |
| bool | tvm::tir::VerifyWellFormed (const IRModule &mod, bool assert_mode=true) |
| Verify if the TIR in the given IRMOdule is well-formed. More... | |
| const PrimFuncNode * | tvm::tir::FindEntryFunc (const IRModule &mod, GlobalVar *result_g_var) |
Find the entry function of the given IRModule, i.e, functions marked by tir::attr::kIsEntryFunc, whose name is main or being the only PrimeFunc. More... | |
| const tir::BlockNode * | tvm::tir::FindAnchorBlock (const IRModule &mod) |
| Find the "anchor block" of the given module. We define the anchor block to be the block with (1) an init statement and (2) having the biggest flops count. The latter condition is only used when there are multiple blocks with an init statement. For example, if the input module is conv2d + fused spatial blocks, conv2d is the anchor block. The input module may not contain more than one such block. For example, a module having two conv2d is not allowed as an input. However, a module created from winograd convolution has multiple blocks with an init statement (input transform, batched GEMM, and output transform). We use the second condition, the flops count, to determine that the batched GEMM block is the anchor block. More... | |
| Pass | tvm::tir::transform::VerifySSA () |
| Pass variant of VerifySSA. More... | |
| Pass | tvm::tir::transform::VerifyMemory () |
| Pass variant of VerifyMemory. More... | |
| Pass | tvm::tir::transform::VerifyGPUCode (Map< String, PrimExpr > constraints) |
| Pass variant of VerifyGPUCode. More... | |
| Pass | tvm::tir::transform::VerifyVTCMLimit (Optional< Target > target=NullOpt) |
| Pass to checks if the size of the allocated vtcm memory satisfies the limit. More... | |
| Pass | tvm::tir::transform::OOBChecker () |
| Statically check TIR code for out of bounds array access. More... | |
Analysis utilities and passes for TIR.
1.9.1