elementwise

Covers cast, fill, the unary ops (zero, reciprocal, sqrt, exp, exp2, silu), the binary ops (add, sub, mul, fdiv), and fma. Every op registers two variants — reg and smem — both at priority 10; the operand storage scope (all-register vs all-shared) is the mutually-exclusive discriminator. Each op is described by an OpSpec (a parse that builds the destination + source list, optional dtype checks, and the scalar expression applied per element).

Variant	Operands	Lowering
elementwise → reg	all register	partition induced by the register layout; op applied per register
elementwise → smem	all shared	synthesized [outer, threads, vec] partition; op applied per (vectorized) element

• elementwise → reg
• elementwise → smem